RTAS’17, the 23rd in a series of annual conferences sponsored by the IEEE, will be held in Pittsburgh, PA, USA, as part of the Cyber-Physical Systems Week (CPSWeek) in April, 2017. CPS Week 2017 will bring together leading conferences, including the International Conference on Information Processing in Sensor Networks (IPSN’17), the International Conference on Hybrid Systems (HSCC’17), the International Conference on Cyber-Physical Systems (ICCPS’17) and RTAS’17.
RTAS’17 invites papers describing original systems and applications, case studies, methodologies and applied algorithms that contribute to the state of practice in the broad field of embedded and open real-time systems and computing. The scope of RTAS’17 will consist of three tracks: (1) Applications, RTOSs and Run-Time Software and Tools, (2) Applied Methodologies and Foundations, and (3) Embedded Systems Design for Real-Time Applications. The conference proceedings will be published by IEEE and indexed on IEEE Explore.
Track 1: Applications, RTOSs, Run-Time Software and Tools.
This track focuses on applications, tools, and run-time software for real-time systems. Relevant areas include, but are not limited to, real-time operating systems, middleware, system utilities, and case studies. Papers submitted to this track should focus on specific systems and implementations. Authors must introduce the application context and clearly define motivating application examples. The papers must also introduce the related research challenges, illustrate the theoretical foundations, and explain the method used in the evaluation. Authors must include a section with experimental results performed on a real implementation, or demonstrate applicability to an industrial case study or working system. The experiment or case study discussions must highlight problems and bottlenecks encountered in the implementation. Simulation-based results are acceptable only if the authors clearly motivate why it is not possible to develop a real system. Submissions that do not consider real-time requirements will not be accepted.
Track 2: Applied Methodologies and Foundations.
This track focuses on basic methodologies, algorithms, and analyses that are applied to real systems to solve specific problems. Papers failing to address applicability as defined in the following guidelines will not be considered as acceptable. Authors must introduce the application context and clearly define motivating application examples. The system models and any assumptions used in the derivation of the results must be applicable to real systems and reflect actual needs. Papers must include a section on experimental results, preferably on real case studies or models of real systems, although the use of synthetic workloads and models is acceptable if appropriately motivated. Submissions that do not consider real-time requirements will not be accepted.
Track 3: Embedded Systems Design for Real-Time Applications.
This track focuses on hardware/software co-design, integration methodologies, design-time tools and architectures for modern embedded systems for real-time applications. General topics relevant to this track include, but are not limited to, architecture description languages and tools, WCET analysis, software and hardware architectures, design space exploration, synthesis and optimization. Of special interest are SoC design for real-time applications, special purpose functional units, specialized memory structures, multi-core chips and communication aspects, FPGA simulation and prototyping, software simulation and compilation for novel architectures and applications, as well as power, timing and predictability analyses. Papers must include a section on experimental results, preferably on real case studies or models of real systems, although the use of synthetic workloads and models is acceptable if appropriately motivated. Submissions that do not consider real-time requirements will not be accepted.
All papers must be submitted electronically in PDF format, following the IEEE conference proceedings format and must describe original work not previously published or concurrently submitted elsewhere. Submitted papers must describe original work not previously published or concurrently submitted elsewhere. The main body of each submitted paper is limited to 10 pages. Additionally, each submission may include an optional appendix with supplemental material that will be read at the discretion of the program committee; this appendix is limited to two pages (for 12 pages total). Authors of accepted papers that exceed 10 pages (due to the inclusion of an optional appendix) will be required to pay a fee of $100 for each page beyond the tenth. Submissions (including the optional appendix) must be formatted according to IEEE conference paper guidelines.
Authors are advised to format their papers so that the case for acceptance is made clear in the main body of the paper (i.e., within the first 10 pages). The optional appendix can be used (for example) to provide additional performance graphs or to provide more detailed versions of proofs that are sketched in the main body of the paper.
A submission based on previous work presented in a workshop with no digital object identifier (DOI) is eligible for acceptance. A submission based on a workshop paper published with a DOI is eligible for acceptance, provided it contains at least 30% new material. As is always the case, the Chair of the Technical Program Committee makes the final determination on acceptance or rejection of acceptable papers.
Submissions can be made here.
- Submissions: October 13th 11:59pm, 2016 (UTC-12) – strictly enforced
- Author Rebuttal: November 20th-23rd, 2016
- Notifications: December 20th, 2016
- Camera-ready papers due: February 15th, 2017, 11:59pm (UTC-12)
- Conference dates: April 18-21, 2017